
2011-2012 Microchip Technology Inc.
Preliminary
DS41579C-page 389
PIC16(L)F1782/3
TABLE 30-12: DIGITAL-TO-ANALOG CONVERTER (DAC) SPECIFICATIONS
FIGURE 30-14:
EUSART SYNCHRONOUS TRANSMISSION (MASTER/SLAVE) TIMING
TABLE 30-13: EUSART SYNCHRONOUS TRANSMISSION REQUIREMENTS
FIGURE 30-15:
EUSART SYNCHRONOUS RECEIVE (MASTER/SLAVE) TIMING
Operating Conditions: VDD = 3V, Temperature = 25°C (unless otherwise stated).
Param
No.
Sym.
Characteristics
Min.
Typ.
Max.
Units
Comments
DAC01*
CLSB
Step Size
—
VDD/256
—
V
DAC02*
CACC
Absolute Accuracy
—
1LSb
DAC03*
CR
Unit Resistor Value (R)
—
600
—
DAC04*
CST
Settling Time(1)
——
10
s
*
These parameters are characterized but not tested.
Legend:
TBD = To Be Determined
Note 1:
Settling time measured while DACR<7:0> transitions from ‘0x00’ to ‘0xFF’.
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
-40°C
TA +125°C
Param.
No.
Symbol
Characteristic
Min.
Max.
Units
Conditions
US120 TCKH2DTV SYNC XMIT (Master and Slave)
Clock high to data-out valid
3.0-5.5V
—
80
ns
1.8-5.5V
—
100
ns
US121 TCKRF
Clock out rise time and fall time
(Master mode)
3.0-5.5V
—
45
ns
1.8-5.5V
—
50
ns
US122 TDTRF
Data-out rise time and fall time
3.0-5.5V
—
45
ns
1.8-5.5V
—
50
ns
Note:
US121
US120
US122
CK
DT
Note:
US125
US126
CK
DT